Hardware designs for the upcoming PlayStation 6 and Microsoft’s next console, codenamed Project Helix, have completed their tape-out phase with semiconductor manufacturer AMD. The development milestone, published on Wednesday, September 23, 2026, by industry leaker KeplerL2 on the NeoGAF forum, establishes the fundamental silicon architecture for both machines ahead of physical fabrication.
According to the leaked technical specifications, the custom graphics processing unit planned for the PlayStation 6 delivers 40 TFLOPS of raw theoretical compute power, whereas the processor engineered for Xbox Project Helix registers 56 TFLOPS. KeplerL2 stated plainly on the forum that “both are taped out,” confirming that the logic circuits are finalized and dispatched to the foundry for physical mask production and silicon validation.
Architecture details and performance metrics
Both system-on-chip designs combine AMD Zen 6 central processing unit cores with AMD RDNA 5 graphics architecture. The projected performance of 56 TFLOPS on Project Helix represents a 40 percent theoretical raw compute advantage on paper over the 40 TFLOPS specified for the PlayStation 6. When measured against current-generation hardware, Project Helix reaches 4.66 times the computing throughput of the 12 TFLOPS found in the Xbox Series X, while the PlayStation 6 quadruples the baseline output of the original PlayStation 5.
Read also: GTA 6 Wanted System: How police, crimes, and chases work in the game
KeplerL2 cautioned community members against drawing direct performance conclusions purely from floating-point operational benchmarks across differing architectures. “TFLOPs is just a measure for FMA throughput. It shouldn’t be ‘normalized’ to another architecture because that’s stupidity. I remember people doing the same for PS5 with the ‘RDNA TFLOPs vs. GCN TFLOPs’. It’s just a bad way to measure things,” the insider stated, addressing earlier speculation that had overstated graphics performance metrics.
Comparative computing power across console generations
A comparison of graphical compute targets across current hardware, mid-cycle revisions, and the newly leaked architectural designs demonstrates the planned scaling:
- Xbox Series S: 4 TFLOPS
- PlayStation 5: 10.28 TFLOPS
- Xbox Series X: 12 TFLOPS
- PlayStation 5 Pro: 16.7 TFLOPS
- PlayStation 6 target: 40 TFLOPS
- Xbox Project Helix target: 56 TFLOPS
Engineering stage and memory bandwidth specifications
Reaching tape-out represents a definitive milestone in semiconductor engineering because it locks the physical layout of the integrated circuit before photomasks are produced for foundry lithography. While the stage prevents further structural changes to the silicon, it is followed by sample validation, bug fixing, and board testing before mass manufacturing can commence. Hardware disclosures associated with the leaks indicate that the PlayStation 6 is being evaluated with 30 GB of GDDR7 memory running on a 160-bit bus, generating 640 GB/s of system memory bandwidth.
The timeline required to validate silicon, produce wafers at scale, and assemble retail inventory aligns with an anticipated launch window in November 2027. That target would place the commercial rollout exactly seven years after the launch of the PlayStation 5 and Xbox Series X and S in November 2020. Commercial releases face external economic variables, including United States tariff policies on imported electronics and continuous cost inflation across memory chips and solid-state storage, which have elevated bill-of-materials expenses across the tech sector since late 2025.
Pending confirmations and missing technical data
Sony Interactive Entertainment, Microsoft, and AMD have not issued public confirmations regarding the reported tape-out milestone or the disclosed computing figures. While memory allocations have been outlined for Sony’s platform, the memory bus configuration, memory type, and total bandwidth allocation for Microsoft’s Project Helix remain entirely unconfirmed.
Physical prototype testing of the early silicon samples will determine final operating clock speeds and thermal thresholds throughout 2027.
