AMD plans to significantly expand the core count in its Ryzen desktop processors with the Zen 6 architecture, known internally as Olympic Ridge. Recent Vazamentos reveal that the next generation will surpass the current limit of 16 cores, offering a top-of-the-line variant with 24 cores. Essa unprecedented configuration aims to serve intermediate users to professionals who demand high parallelism in multithreaded tasks, maintaining compatibility with the AM5 socket already established on the market.
The chiplet-based modular strategy remains AMD’s cornerstone. The Cada Zen 6 CCD chiplet must house up to 12 cores, allowing combinations that scale from 6 to 24 total cores. TSMC’s 2nm manufacturing process contributes to gains in energy efficiency and density, while the L3 cache per chiplet reaches 48 MB, resulting in up to 96 MB in the most powerful model.
Main core configurations expected in the Olympic Ridge line
- 24 cores (two CCDs of 12 cores each) – flagship model for maximum productivity and content creation;
- 20 cores (two CCDs of 10 cores each) – high-intermediate option for light workstations;
- 16 cores (two CCDs of 8 cores each) – continuity of the current range with architectural improvements;
- 12 cores (single CCD) – focus on balanced performance for advanced users;
- 10 cores (a single CCD) – intermediate segment with good cost-benefit;
- 8 cores (single CCD) – popular option for gaming and everyday multitasking;
- 6 cores (single CCD) – line input with optimized energy efficiency.
Zen 6 Architectural Advancements Beyond Core Count
The Zen 6 architecture brings a complete redesign of the front-end, with a broader dispatch engine and native support for 512-bit AVX-512 vectors in full mode. Essas changes should increase IPC compared to Zen 5, especially in workloads involving scientific computing, AI, and video editing. The AM5 platform receives extended support, allowing current motherboards to be updated via BIOS to receive the new processors.
Modular strategy and market positioning
AMD maintains its focus on the mainstream segment with the Olympic Ridge, differentiating it from the HEDT or Threadripper lines. The chiplet design allows us to offer more options without drastically increasing costs in entry-level models.
Variants with 3D V-Cache technology should complement the line, prioritizing performance in games and latency-sensitive applications.
Manufacturing process and energy efficiency
The 2nm node represents the main technological leap of the generation. Esse advance promises higher clocks with controlled consumption, benefiting both high-performance systems and more compact configurations. AMD reinforces the longevity of the AM5 platform, consolidating it as the basis for multiple future generations.
Expectations for launch and variants
The roadmap points to the second half of 2026 as the likely window for arrival on the market. Modelos with 3D stacked cache should appear in parallel or shortly after the initial launch, expanding options for gamers and content creators.
The inclusion of configurations such as 10 and 20 cores fills gaps in the current offering, offering more accurate alternatives for different usage profiles.
